Graph planarity and electronic circuit boards

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In another MSE question, I found the following definition for 2-layer circuit board decomposition of a graph:

A circuit board is defined as a pair of planar graphs with vertices identified, i.e. a ordered triple $\langle V,E_1,E_2\rangle$ such that there are planar embeddings $h_1,h_2$ for the planar graphs $\langle > V,E_1\rangle$ and $\langle V,E_2\rangle$, respectively, such that $h_1(v)=h_2(v)$ for each $v\in V$.

Similar definition would be for $n$-layer circuit board decomposition.

Is there an official name for minimal number of circuit board layers needed for graph decomposition? (for planar graphs, this number would be 1, for nonplanar ones greater than 1)

Is there an application, or another mathematical result, theorem, etc., involving such number?


EDIT/UPDATE: In this presentation by David Ippstein, I found definition of several related numbers (graph properties):

  • Book thickness
  • Graph thickness
  • Geometric thickness

One can find subtle differences between definitions of these properties in the same paper, as well some computational results.

Is circuit-board thickness a term different from the three above, or equivalent to one of them?