The minimum negative integer value that can be represented using 32-bit signed representation

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As far as signed binary numbers are concerned for a 32bit machine, the leftmost bit is allocated for the sign. When I try to calculate the smallest negative integer value which can be stored in a machine, i follow the following steps:

  1. I assign the most significant bit as 1 (because it is negative)
  2. I place 1's into the remaining bits, thus the number of 1's I have for the magnitude of the number is 31.
  3. I convert this binary number to decimal:

$$ 2^{30}+ 2^{29}+...+2^1+2^0=2^{31}-1 $$

  1. With the negative sign, the smallest number is $$1-2^{31}$$

However the following source says otherwise. It says the smallest value is $$ -2^{31}$$ on the third page.

https://www.uio.no/studier/emner/matnat/math/MAT-INF1100/h12/kompendiet/kap4.pdf

What am I doing wrong here?

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The smallest negative number is a $1$ followed by $31$ zeros which is interpreted as $-2^{31}.$ Because twos' complement is essentially arithmetic modulo $2^{32},$ it would be equally logical to interpret it as $2^{31}.$ The negative value is chosen so that the negative integers are precisely those with a $1$ as the most significant bit.

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Your calculation in itself is correct. However, there are more efficient ways to represent negative integers than sign & magnitude, which is the method you use. Such methods include "two's complement", which is in fact described in the link you provided. When they write that the smallest negative integer we can represent is $-2^{31}$ they refer to the more efficient methods, and not the naive method. I suggest you continue to read the section about two's complement and maybe then it will all make more sense.

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You are assuming the representation is signed-magnitude, which is a valid representation of negative numbers. Your answer is correct for that representation. Most computers use two's complement, which allows one more negative value. The most negative value is $1$ followed by $31$ zeros and represents $-2^{-31}$. The motivation is that you can do arithmetic in two's complement without worrying about whether numbers are positive or negative and it comes out right, simplifying the design of the chip.

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In the two's complement representation,

$$\begin{align} 000&\to0 \\001&\to1 \\010&\to2 \\011&\to3 \\100&\to-4 \\101&\to-3 \\110&\to-2 \\111&\to-1 \end{align}$$

In this representation, the values are in increasing order (except for the $3/-4$ jump), so that virtually the same adder can be used for unsigned and signed additions/subtractions.