NOT and NAND Logic gate

Question

My working

.Z passes though NAND becoming Z'

.Y passes through NOT gate becoming Y'

.Y' Passes though NAND becoming Y

therefore answer is Z'Y

Answer 1

The inputs to the NAND gate (1) are $Z$ and $\overline{Y}$. The image below shows a breakdown of a NAND gate in terms of an AND gate and a NOT gate.

In your case, let $A = Z, B = \overline Y$. The output of the NAND gate is then $\overline{\left(Z\overline Y\right)} = \overline Z + Y$ and so the correct answer is option 3.