Logic gate simplification

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Hi I was building different logic gates using only the NOR gate However, I was very confused with the answers people got for example.

Anyway the image shows an implementation of NAND gate using NOR Gates

The top part of the image shows how everyone else gets NAND from using NOR

The bottom part of the image is what I think It can be simplified to. Please tell me if what I have done is correct thanks.

This is what I got

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Your alternative circuit computes NOT(NOT(A NOR B)), which the same as NOR rather than NAND.

Your computation has an error in very the first step where you represent A NOR B as $\overline A+\overline B$ -- it should be $\overline{A+B}$.