I understand (I think) that I can construct a gate operating on $n$ bits for a an $m>n$ $m$-bit system where the bits on which the gate operates are "adjacent" at positions $p+1$ through $p+n$ from the corresponding gate $G_n$ that operates on a $n$-bit system as
$$I^{\otimes p}\otimes G_n\otimes I^{\otimes (m-n-p)}$$
but it's not clear to me how to do this of the affected bits are at arbitrary positions in the operand.
For example how would I construct a CNOT gate operating on the 3rd and 7th bits of an 8 bit system, or a CCNOT gate operating on the 2nd, 5th and 8th?
Is there a general expression, like the one above for accomplishing this that I'm just missing, or is the procedure more involved?
A CNOT gate over a two-bit system can be written as $$ M = \pmatrix{1&0\\0&0} \otimes I + \pmatrix{0&0\\0&1} \otimes \pmatrix{0&1\\1&0} $$ where the first bit is used as the controller for the second.
For a CNOT gate in which the 3rd bit is used as a controller for the 7th, we could write $$ G = I^{\otimes 2} \otimes \pmatrix{1&0\\0&0} \otimes I^{\otimes 3} \otimes I \otimes I \\ + I^{\otimes 2} \otimes \pmatrix{0&0\\0&1} \otimes I^{\otimes 3} \otimes \pmatrix{0&1\\1&0} \otimes I $$ Perhaps now it is clear how this should be done in general.
Taking $M$ as above, we can express the CCNOT gate over a 3-bit system as $$ \pmatrix{1&0\\0&0} \otimes I^{\otimes 2} + \pmatrix{0&0\\0&1} \otimes M $$ Distributing this tensor product, we can write the gate as $$ \pmatrix{1&0\\0&0} \otimes I^{\otimes 2} + \pmatrix{0&0\\0&1} \otimes \pmatrix{1 & 0\\0&0} \otimes I + \pmatrix{0&0\\0&1} \otimes \pmatrix{0 & 0\\0 & 1} \otimes \pmatrix{0&1\\1&0} $$ Now, we apply the same trick. In other words, we insert an $I$ for the slots corresponding to bits that are left alone.