Names of 3 input logic gates

Question

I've tried to look this up online, I may have used the wrong terminology.

This question is about the names of logic gates with three boolean inputs, and one boolean output.

This is a truth table for AND.

000 - 0
001 - 0
010 - 0
011 - 0
100 - 0
101 - 0
110 - 0
111 - 1

In such a definition, the left side of this truth table needn't be included. For example, the above can be rewritten as:

0000 0001

I've also included a mid way space to help readability.

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Question:

What are names of, or corrections to the names of, significant missing 3 input boolean logic gates below?

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I/O         Names

0000 0000 * False
0000 0001 * AND, Sum = 3
0000 0010
0000 0011 - A and B
0000 0100
0000 0101 - A and C, If A then C else 0
0000 0110
0000 0111
0000 1000 - (A > B) > C
0000 1001
0000 1010 - A > C
0000 1011
0000 1100 - A > B, If A then B else 0
0000 1101
0000 1110
0000 1111 - A
0001 0000 - (A < B) < C
0001 0001 - If B then C else 0
0001 0010
0001 0011
0001 0100
0001 0101 - (A or B) and C
0001 0110 * Sum = 2
0001 0111 * Cary, Majority, Sum > 1
0001 10...
0001 1100
0001 1101 * If B then C else A
0001 1110
0001 1111
0010 0000
0010 0001
0010 0010 - B > C
0010 0011
0010 01...
0010 1...
0011 0000 - A < B
0011 0001
0011 0010
0011 0011 - B
0011 01...
0011 10...
0011 1100 - A xor B
0011 1101
0011 1110
0011 1111 - A or B
0100 00...
0100 0100 - B < C
0101 0000 - A < C
0101 0001
0101 0010
0101 0011 * If (If A then B else C)
0101 0100
0101 0101 - C
0101 0110
0101 0111 - (A and B) or C
0101 1010 - A xor C
0101 1011
0101 1100
0101 1101
0101 1110
0101 1111 - A or C
0110 1000 * Sum = 1
0110 1001 * XOR, Add
0110 1010
0110 1011
0110 11...
0111 0...
0111 10...
0111 1100
0111 1101
0111 1110 * Not Equal
0111 1111 * OR, Sum > 0
1000 0000 * NOR, Sum = 0
1000 0001 * Equal
1000 0010
1000 0011
1000 01...
1000 1...
1001 00...
1001 0100
1001 0101
1001 0110 * XNOR
1001 0111 * Sum != 1
1001 1000
1001 1001 - A = B
1001 1010
1001 1011
1001 11...
1010 00...
1010 0100
1010 0101 - A = C
1010 0110
1010 0111
1010 1000 - AndOrInv (not ((A and B) or C))
1010 1001
1010 1010 - Not C
1010 1011
1010 1100
1010 1101
1010 1110
1010 1111 - A >= C, C <= A
1011 0...
1011 1000
1011 1001
1011 1010
1011 1011 - B >= C
1011 11...
1100 0000
1100 0001
1100 0010
1100 0011 - A = B
1100 01...
1100 10...
1100 1100 - Not B
1100 1101
1100 1110
1100 1111 - A >= B
1101 0...
1101 10...
1101 1100
1101 1101 - B <= C
1101 1110
1101 1111
1110 0...
1110 1000 * Sum < 2
1110 1001 * Sum != 2
1110 1010 - OrAndInv (not ((A or B) and C))
1110 1011
1110 11...
1111 0000 - Not A
1111 0001
1111 0010
1111 0011 - A <= B
1111 0100
1111 0101 - A <= C, C >= A
1111 0110
1111 0111
1111 10...
1111 1100
1111 1101
1111 1110 * NAND, Sum < 3
1111 1111 * True

Answer 1

There are actually (obviously) 256 such 3-input logic gates. You've already got the 2 that depend on no inputs, and the 6 that depend on one input; there are also 30 additional ones that depend only on two of the three inputs (and have names like "A and B" for 0000 0011), and the other 218 depend on all three. Important ones you're missing include XOR 0110 1001 and Carry 0001 0111, which together can be used to create a 3-bit, or "full", adder.

Answer 2

Missing the most important (arguably) 3 input logic gate, IF

A B C  IF A THEN B ELSE C
1 1 1  1
1 1 0  1
1 0 1  0
1 0 0  0
0 1 1  1
0 1 0  0
0 0 1  1
0 0 0  0

In practice, it is common to define AndOrInv and OrAndInv because of how few CMOS transistors (and thus low power / fast switching) they can be created with:

    AndOrInv:     
A B C  not ((A and B) or C)
1 1 1  0
1 1 0  0
1 0 1  0
1 0 0  1
0 1 1  0
0 1 0  1
0 0 1  0
0 0 0  1

    OrAndInv:     
A B C  not ((A or B) and C)
1 1 1  0
1 1 0  1
1 0 1  0
1 0 0  1
0 1 1  0
0 1 0  1
0 0 1  1
0 0 0  1

And don't even get started on 3 input tri-state gates. They input high, low, and high-impedance, and are probably more important to designers than the Boolean gates.

And let's not forget the Toffoli Gate and Fredkin Gate. Either can be used as a primitive to construct all reversible circuits, which are useful because they don't increase entropy and thus can (theoretically) run with low heat dissipation.