Writing a boolean formula and logic circuit that computes mux

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Let $mux(p_{11}, p_{10}, p_{01}, p_{00}, x_1, x_0) = P_{x1x0}$ (with all variables bits). Write a boolean formula, and then draw a circuit, that computes mux. For the latter, use only and, or, and not gates.

Unless you're very crafty I don't expect a logic circuit answer.

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I am assuming that $x_1 = 0, x_0 = 0$ selects the left most value.

The formula is $\overline{x_1}\overline{x_0}p_{11} + \overline{x_1}x_0 p_{10} + {x_1}\overline{x_0}p_{01} + {x_1 x_0}p_{00}$.

Addendum: Any formula for a Boolean function $f(a,b,c,...)$ can be expanded as $f(a,b,c,...) = \overline{a}f(0,b,c,...) + a f(1,c,b,...)$.

Hence $\operatorname{mux}(a,b,c,d, x_1, x_0) = \overline{x_1}\operatorname{mux}(a,b,c,d, 0, x_0) +x_1 \operatorname{mux}(a,b,c,d, 1, x_0)$, and similarly you can expand both of these terms with respect to $x_0$.

Then notice that $\operatorname{mux}(a,b,c,d, 0,0) = a$, etc, and you get the above formula.

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The classical gate-level form of a 4-input multiplexer is:
(taken from here)

enter image description here

The multiplexer inputs control the AND gates. Only one of the four AND gates is selected to forward its respective input to the final OR gate.

An alternative circuit composed of smaller gates with more levels:
(generated using Logic Friday 1) enter image description here

Note that multiplexer circuits are also called "ITE" (if-then-else) gates.

You can construct a multiplexer with $2^n$ inputs from a tree-shaped cascade of smaller multiplexers. This is sometimes called "chaining multiplexers".